1. Field
This disclosure is generally related to electric and electronic circuit design and in particular to tools for designing electronic devices, such as Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), boards, and systems.
2. Description of Related Art
Typical chip design involves working with traditional documents, such as documents describing a chip or a test plan for a chip. Document editors, such as word processors, generate such documents.
Several varieties of front-end input tools are available for designing a typical chip. Such front end input tools may be GUI-based (Graphical User Interface based), web-based, and language-based. The present disclosure relates to a system and method for designing an electric or electronic circuit. The following abbreviations or acronyms may appear in the present disclosure:    VHSIC: Very High Speed Integrated Circuit,    Verilog: A hardware description language,    CSV: Comma Separated Values, typically generated by EXCEL® (Trademark of Microsoft Corporation),    OpenXML: An open data storage format using XML, where XML: eXtensible Markup Language,    C/C++h: C and C++ are software programming languages, where h refers to the header files having constants and data structures,    OVM: Open Verification Methodology, is a hardware verification method promoted by Mentor Graphics, Inc. and Cadence Design Systems, Inc.,    VMM: Verification Methodology Manual, is a hardware verification method promoted by Synopsys, Inc.,    API: Application Programmer's Interface, and    Tcl: Tool Command Language.
As a person having an ordinary skill in the art would appreciate, an arrow entering a block or a symbol indicates an input and an arrow leaving a block or a symbol indicates an output. Similarly, connections described below may be of any electromagnetic type, such as electrical, optical, radio-frequency, and magnetic.
Further, a hardware interface or a software interface may indicate one or more registers and one or more properties of the one or more registers. The hardware interface or a software interface may indicate one or more bits of a register and one or more properties of the one or more bits of the one or more registers. The hardware interface or the software interface may indicate a sequence of steps and one or more properties of the steps related to turning on a device having an electric or electronic circuit. The hardware interface or the software interface may indicate an acceptable register value or an acceptable bit value.
A “derived view” may indicate one or more files generated from a document describing the device. The derived views may include an RTL description for a hardware synthesis, a C/C++ header file for a device driver, a C/C++ header file for a firmware and a C/C++ header file for developing a software, a test file for describing the device and the software, and a documentation file for describing the device. All output files may be “derived views” but those related to a device design, such as RTL, VHDL, and Verilog files may be termed “design views.”